# US 2024/0201719 A1 · Linear voltage regulator circuit and multiple output voltages

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- Number: US 2024/0201719 A1
- Document ID: US20240201719A1
- Status: Published application
- Kind: A1
- Application number: 18/590,880
- Filed: 2024-02-28
- Published: 2024-06-20
- Earliest claimed: 2021-01-06
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.; Tsmc China Company Limited
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.; Tsmc China Company Limited
- Inventors: Yong-Liang JIN; Ya-Qi MA; Wei LI; Di FAN
- Web page: https://patentgrep.com/patent/US20240201719A1

## CPC

- G05F 1/565: sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence)
- H03K 17/005: {with several inputs only}
- G05F 1/462: {as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic}
- G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown}
- G05F 1/595: semiconductor devices connected in series
- H03K 17/162: {without feedback from the output circuit to the control circuit}
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A device includes a voltage regulator circuit configured to pull up a voltage at an output terminal to equal to half of a supply voltage; multiple first transistors coupled between the output terminal and a voltage terminal providing the supply voltage; and a control circuit configured to pull down gate voltages of the first transistors from the supply voltage to a voltage level between the supply voltage and a ground voltage at a first time. The first transistors are configured to pull up the voltage at the output terminal to the supply voltage at a second time.

## Claims

### Claim 1

A device, comprising:
a voltage regulator circuit coupled to an output terminal;
a plurality of transistors coupled between the output terminal and a voltage terminal providing a supply voltage,
wherein when the plurality of transistors are turned off, the voltage regulator circuit is configured to charge the output terminal to have a voltage different from the supply voltage at a first time; and
a control circuit configured to adjust gate voltages of the plurality of transistors to a voltage level between the supply voltage and a ground voltage at a second time after the first time and to adjust the gate voltages of the plurality of transistors to the ground voltage at a third time after the second time for fully turning on the plurality of transistors.

### Claim 2 (depends on 1)

The device of claim 1, wherein the control circuit comprises:
a resistive unit having a first terminal to receive a first control signal and a second terminal to output a second control signal according to the first control signal to pull down the gate voltages of the plurality of transistors at the second time; and
a capacitive unit coupled between the second terminal of the resistive unit and a ground voltage terminal.

### Claim 3 (depends on 1)

The device of claim 1, wherein the plurality of transistors are P conductivity type transistors coupled in series with each other between the output terminal and the voltage terminal;
wherein the control circuit comprises:
a resistive unit configured to transmit, in response to a first control signal, a second control signal to gates of the plurality of transistors.

### Claim 4 (depends on 1)

The device of claim 1, further comprising:
a plurality of switching circuits coupled with each other in parallel between the output terminal and the voltage terminal, and each configured to switch on in response to a corresponding one of a plurality of control signals different from each other.

### Claim 5 (depends on 4)

The device of claim 4, further comprising:
a plurality of inverters each configured to generate, based on a voltage at the output terminal, the corresponding one in the plurality of control signals,
wherein threshold voltages of the plurality of inverters are different from each other.

### Claim 6 (depends on 4)

The device of claim 4, wherein each one in the plurality of switching circuits comprises a plurality of P-type transistors coupled in series with each other.

### Claim 7 (depends on 4)

The device of claim 4, further comprising:
a detection circuit configured to generate, according to the voltage at the output terminal and the supply voltage, the plurality of control signals to turn on the plurality of switching circuits.

### Claim 8 (depends on 7)

The device of claim 7, wherein the detection circuit comprises:
a Schmitt trigger inverter configured to generate, in response to the voltage at the output terminal having a first voltage level, one of the plurality of control signals to turn on a first circuit of the plurality of switching circuits.

### Claim 9 (depends on 7)

The device of claim 7, wherein a first signal in the plurality of control signals falls before a second signal in the plurality of control signals falls to the ground voltage.

### Claim 10 (depends on 1)

The device of claim 1, wherein the voltage regulator circuit is configured to operate in response to a first control signal to pull up a voltage at the output terminal, and
the control circuit is configured to pull down the gate voltages in response to a second control signal,
wherein the first and second control signals have different logic values.

### Claim 11 (depends on 10)

The device of claim 10, further comprising:
a selection circuit configured to generate the first and second control signals in response to switching an operation mode of the device.

### Claim 12

A device, comprising:
a first transistor and a second transistor that are coupled between an output terminal and a voltage terminal providing a supply voltage,
wherein when the second transistor is turned off in a first operation mode, the first transistor is configured to be turned on to pull up a voltage at the output terminal to a first voltage level; and
a first inverter unit configured to generate, in response to the voltage at the output terminal, a first control signal to turn on the second transistor in a second operation mode to pull up the voltage at the output terminal from the first voltage level to a second voltage level when the first transistor is turned off.

### Claim 13 (depends on 12)

The device of claim 12, wherein the first voltage level is half of the second voltage level.

### Claim 14 (depends on 12)

The device of claim 12, further comprising:
a third transistor coupled with the second transistor and configured to receive the first control signal in the second operation mode to transmit the supply voltage to the second transistor.

### Claim 15 (depends on 12)

The device of claim 12, further comprising:
third and fourth transistors coupled between the output terminal and the voltage terminal; and
a second inverter configured to operate according to the supply voltage to generate, in response to the voltage at the output terminal, a second control signal,
wherein the third and fourth transistors are configured to pull up the voltage at the output terminal in the second operation mode.

### Claim 16 (depends on 15)

The device of claim 15, wherein the first control signal reaches a ground voltage at a first time, and the second control signal reaches the ground voltage at a second time after the first time.

### Claim 17

A method, comprising:
outputting, by a power supply generator, an output signal to have a voltage equal to half of a supply voltage at a first time when a first series of transistors are turned off and a second series of transistors are turned on, wherein the first and second series of transistors are coupled in parallel between a supply voltage terminal providing the supply voltage and an output terminal outputting the output signal; and
outputting, by the power supply generator, the output signal to have an increasing voltage at a second time after the first time when the first series of transistors are turned on and the second series of transistors are turned off.

### Claim 18 (depends on 17)

The method of claim 17, wherein the output terminal is coupled to a gate terminal of one in the second series of transistors.

### Claim 19 (depends on 17)

The method of claim 17, further comprising:
generating a first control signal to an amplifier of the power supply generator to generate a second control signal to one in the second series of transistors for transmitting the supply voltage to the output terminal.

### Claim 20 (depends on 19)

The method of claim 19, further comprising:
generating a third control signal to switch on the first series of transistors,
wherein the first control signal and the third control signal have different logic values.