Memory cells with darlington pair bipolar junction transistor selector devices
AssigneeInternational Business Machines Corporation
InventorsAlexander Reznicek, Bahman Hekmatshoartabari, Praneet Adusumilli, Fabio Carta
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Abstract
A phase change memory device or a ReRAM device is integrated with a pair of bipolar junction transistors, the pair of bipolar junction transistors being arranged in a Sziklai Darlington transistor configuration. A small unit cell footprint is obtained by pairing a vertical bipolar junction transistor with a lateral bipolar junction transistor, the memory device being electrically connected to the collector of the lateral bipolar junction transistor.
Claims20
A memory cell, comprising:
- a memory device comprising phase change material;
- and
- a selector device, the selector device comprising:
- a lateral bipolar junction transistor including an intrinsic base, an extrinsic base, a collector region and an emitter region, the collector region of the lateral bipolar junction transistor being electrically connected to the memory device;
- a vertical bipolar junction transistor, the extrinsic base of the lateral bipolar junction transistor comprising a collector region of the vertical bipolar junction transistor;
- one of the lateral bipolar junction transistor and the vertical bipolar junction transistor being a PNP transistor, the other of the lateral bipolar junction transistor and the vertical bipolar junction transistor being an NPN transistor, the lateral bipolar junction transistor and the vertical bipolar junction transistor comprising a Sziklai Darlington transistor pair.
A memory cell, comprising:
- a memory device, the memory device comprising a phase change memory device or a resistive random access memory device;
- and
- a selector device, the selector device comprising a lateral bipolar junction transistor and a vertical bipolar junction transistor configured as a Sziklai Darlington transistor pair, the lateral bipolar junction transistor comprising a collector region, the collector region of the lateral bipolar junction transistor being electrically connected to the memory device.
A method of fabricating a memory cell, comprising:
- forming a Sziklai Darlington transistor pair including a lateral bipolar junction transistor and a vertical bipolar junction transistor atop the lateral bipolar junction transistor, the lateral bipolar junction transistor comprising an emitter region, a collector region, an intrinsic base region, and an extrinsic base region adjoining the intrinsic base region, wherein the extrinsic base region of the lateral bipolar junction transistor comprises a collector region of the vertical bipolar junction transistor;
- and
- forming a memory device electrically connected to the collector region of the lateral bipolar junction transistor.
Dependencies are inferred from the claim text.