Semiconductor device and electronic system including the same

A semiconductor device, comprising:

• a peripheral circuit structure;
• and
• a cell array structure overlapping the peripheral circuit structure in a vertical direction and including a first memory cell block, a second memory cell block, a third memory cell block, and a fourth memory cell block,
• wherein:
• the peripheral circuit structure includes:
• a substrate including:
• an active region including a central active region extending in a first direction, a first extended active region extending from a first edge of the central active region in a second direction perpendicular to the first direction, a second extended active region extending from a second edge of the central active region in the second direction, a third extended active region extending from a third edge of the central active region in the second direction, and a fourth extended active region extending from a fourth edge of the central active region in the second direction, and
• a device isolation layer defining the active region;
• and
• a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure on the active region and spaced apart from one another,
• the central active region, the first extended active region, and the first gate structure constitute a first pass transistor, the central active region, the second extended active region, and the second gate structure constitute a second pass transistor, the central active region, the third extended active region, and the third gate structure constitute a third pass transistor, and the central active region, the fourth extended active region, and the fourth gate structure constitute a fourth pass transistor,
• the first to fourth pass transistors share one drain region on the central active region, and
• the active region has an H shape in a plan view.

An electronic system, comprising:

• a main substrate;
• a semiconductor device on the main substrate;
• and
• a controller electrically connected to the semiconductor device on the main substrate,
• wherein the semiconductor device includes:
• a substrate including:
• an active region including a central active region extending in a first direction, a first extended active region extending from a first edge of the central active region in a second direction perpendicular to the first direction, a second extended active region extending from a second edge of the central active region in the second direction, a third extended active region extending from a third edge of the central active region in the second direction, and a fourth extended active region extending from a fourth edge of the central active region in the second direction, and
• a device isolation layer defining the active region;
• and
• a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure on the active region and spaced apart from one another,
• wherein:
• the central active region, the first extended active region, and the first gate structure constitute a first pass transistor, the central active region, the second extended active region, and the second gate structure constitute a second pass transistor, the central active region, the third extended active region, and the third gate structure constitute a third pass transistor, and the central active region, the fourth extended active region, and the fourth gate structure constitute a fourth pass transistor,
• the first to fourth pass transistors share one drain region on the central active region, and
• the active region has an H shape in a plan view.