Semiconductor device

A semiconductor device, comprising:

• a transistor that includes a first source/drain region and a second source/drain region that are spaced apart from each other, a channel region interposed between the first and second source/drain regions, a gate dielectric layer in contact with the channel region, and a gate electrode disposed on the gate dielectric layer;
• a bit line electrically connected to the first source/drain region;
• and
• a data storage structure that is electrically connected to the second source/drain region,
• wherein the data storage structure includes,
• a first electrode electrically connected to the second source/drain region;
• a second electrode;
• and
• a dielectric layer disposed between the first electrode and the second electrode,
• wherein the second electrode includes a compound semiconductor layer doped with boron (B) and a conductive layer disposed on the compound semiconductor layer,
• wherein the compound semiconductor layer includes two or more elements,
• wherein the two or more elements include silicon (Si) and germanium (Ge), and
• wherein a concentration of the boron (B) in the compound semiconductor layer is within a range of about 0.1 at % to about 5 at %, and a concentration of the silicon (Si) in the compound semiconductor layer is within a range of about 10 at % to about 15 at %.

A semiconductor device, comprising:

• a device isolation layer that defines active regions on a substrate;
• gate electrodes that cross the active regions and extend into the device isolation layer;
• first impurity regions and second impurity regions formed in the active regions on both sides of the gate electrodes;
• bit lines disposed on the gate electrodes and electrically connected to the first impurity regions;
• upper conductive patterns disposed on side surfaces of the bit lines and electrically connected to the second impurity regions;
• first electrodes that vertically extend on the upper conductive patterns and are connected to the upper conductive patterns, wherein the first electrodes are horizontally spaced apart from each other;
• at least one supporter layer disposed between horizontally adjacent first electrodes and in contact with the first electrodes;
• a dielectric layer disposed on the first electrodes and the at least one supporter layer;
• and
• a second electrode disposed on the dielectric layer,
• wherein the second electrode includes a compound semiconductor layer doped with an impurity element and a conductive layer disposed on the compound semiconductor layer,
• wherein the compound semiconductor layer includes two or more elements and includes a semiconductor material doped with the impurity element,
• wherein the two or more elements include a first element and a second element, and
• wherein a concentration of the impurity element in the compound semiconductor layer is in a range of about 0.1 at % to about 5 at %, and a concentration of the first element in the compound semiconductor layer is in a range of about 10 at % to about 15 at %.