Cmos image sensor for rts noise reduction using non-linear statistics and impulsive metrics for signal processing

A column level readout circuit (311) as used in a CMOS image sensor for RTS noise reduction comprises:

• a plurality of low-level noise column level amplifier (CLA) (203), wherein the low noise CLA (203) is configured to provide sufficient gain to signal received from source follower for suppressing noise;
• a plurality of thermal noise filter (204), wherein the thermal noise filter (204) is configured to filter out thermal noise components from RTS noise components;
• a plurality of maxima detector (205) and minima detector (206), wherein the maxima detector (205) and minima detector (206) are configured to provide maxima value and minima value to input signal provided by thermal noise filter (204);
• a plurality of sample and hold reset (SHR) switch (207), wherein the SHR switch (207) is configured to transfer median value of the reset signal provided by the maxima and minima detectors (205 and 206) respectively;
• a plurality of sample and hold signal (SHS) (208), wherein the SHS switch (208) is configured to transfer median value of the pixel integrated signal provided by the maxima and minima detectors (205 and 206) respectively;
• a plurality of analog to digital convertor (ADC), wherein the output sampled when the SHR and SHS switches (207 and 208) are ON are provided to the ADC respectively;
• and
• a digital number generated by the ADC (209) which is a representative of voltage level at input of ADC (209).

A method of reduction of random telegraph signal (RTS) noise in reset phase through using a CMOS image sensor, wherein the method includes:

• first, reset transistor (MRST) (306) is turned ON by applying a reset switch (304) which resets the floating diffusion node to a voltage VDD_RST;
• then, the row select (RS) transistor (202) is closed to readout information of each row in a pixel array and thereby connecting it with a column level readout circuit (311);
• then, a source follower (SF) transistor (308) buffers its input voltage onto an output column bus;
• then, an output signal from a low noise level column level amplifier (CLA) (203) is transferred as an input to a thermal noise filter (204);
• thereafter, output signal is transferred from thermal noise filter (204) as an input to maxima detector (205) and minima detector (206);
• subsequently, maxima and minima values are obtained from maxima detector (205) and minima detector (206) respectively;
• thereafter, the maxima and minima values are summed up to determine a median value;
• eventually, obtained median value is transferred to a sample and hold of an ADC (209) when SHR switch (207) is ON;
• and
• lastly, digital number is generated using the ADC (209) which is a representative of reset voltage in the pixel.

A method of reduction of the random telegraph signal (RTS) noise in signal phase (1000) through using the novel circuit of the CMOS image sensor. The method includes:

• firstly, switching ON a pinned photodiode PPD (201) to generate and accumulate charges generated due to incident photons;
• then, transferring and storing of the accumulated electrons to floating diffusion node (305) of by closing a transfer gate (302);
• then, closing of a row select transistor (202) to readout information of each row in a pixel array and connecting it to a column low noise amplifier CLA (203);
• further, transferring stored charges on the floating diffusion node (305) to the column bus using a source follower transistor (308);
• thereafter, transferring output signal from low level noise CLA (203) as an input to a thermal noise filter (204);
• subsequently, transferring output signal from the thermal noise filter (204) as an input to a maxima detector (205) and a minima detector (206);
• then, summing up maxima and minima values obtained from the maxima detector (205) and the minima detector (206) to obtain median value;
• next, transferring the obtained median value to a to a sample and hold of an ADC (209) when SHS switch (208) is ON;
• and
• finally, digital number is generated using the ADC (209) which is a representative of the signal voltage integrated in the pixel.

A method of operation of median detection circuit utilized in a CMOS image sensor, wherein the method includes:

• firstly, a capacitor C1 is initially charged and reset to 0 V such that a capacitor C1 is devoid of charges;
• thereafter, a capacitor C2 is initially charged and set to voltage VDD in order to store charges in the capacitor C2;
• then, input voltage Vin is sampled on the input of a first comparator U1 (502) and a second comparator U2 (509);
• further, the first comparator U1 (502) compares sampled voltage Vin with voltage across capacitor C1;
• on comparing Vin and Vc1, if Vin>Vc1, then a switch S1 is turned ON and the capacitor C1 is charged linearly for a pre-determined time duration until Vin=V_C1;
• on comparing Vin and Vc2 if Vin<Vc2, then a switch S3 is turned ON and the capacitor C2 is discharged linearly for a pre-determined time duration until Vin=Vc2;
• and
• lastly, a switch S5 is turned ON and median value is obtained by summing up maxima and minima values obtained on capacitor C1 and capacitor C2 respectively.