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US 2024/0195453 A1Published application
Serial Communication Link Driver Circuit With Switchable Shunt Circuit
AssigneeApple Inc.
InventorsYudong Zhang, Sanjeev K. Maheshwari, Charles L. Wang
Life of this patent
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Abstract
A driver circuit for a serial communication bus employs multiple switch circuits to generate different voltage levels on a set of signal lines included in the serial communication bus. The different voltage levels correspond to different values for a set of bits to be transmitted via the serial communication bus. The driver circuit also employs a shunt circuit that couples at least two of the signals together in response to the set of bits matching a particular data pattern.
Claims20
An apparatus, comprising:
- a first plurality of driver circuits configured to generate, on a first signal line included in a communication bus and based on a plurality of bits, a first subset of a plurality of voltage levels;
- a second plurality of driver circuits configured to generate on a second signal line included in the communication bus and based on the plurality of bits, a second subset of the plurality of voltage levels, wherein a data symbol based on respective values of the plurality of bits is encoded using respective voltage levels of the first signal line and the second signal line;
- and
- a shunt circuit configured to couple the first signal line to the second signal line in response to a determination that a subset of the plurality of bits matches a particular pattern.
1 more element
A method, comprising:
- receiving a plurality of bits by a driver circuit coupled to a communication bus that includes a plurality of signal lines;
- generating, by the driver circuit using the plurality of bits, a first subset of a plurality of voltage levels on a first signal line of the plurality of signal lines;
- generating, by the driver circuit using the plurality of bits, a second subset of the plurality of voltage levels on a second signal line of the plurality of signal lines;
- and
- coupling, by the driver circuit, the first signal line to the second signal line in response to determining that a subset of the plurality of bits matches a particular pattern.
2 more elements
An apparatus, comprising:
- a first device coupled to a communication bus that includes a plurality of signal lines;
- and
- a second device coupled to the communication bus;
- and
- wherein the first device is configured to:
- generate, using a plurality of bits, a first subset of a plurality of voltage levels on a first signal line of the plurality of signal lines;
- generate, using the plurality of bits, a second subset of the plurality of voltage levels on a second signal line of the plurality of signal lines;
- and
- couple the first signal line to the second signal line in response to determining that a subset of the plurality of bits matches a particular pattern.
6 more elements
Dependencies are inferred from the claim text.