Power gating circuit and a semiconductor chip including the same

A semiconductor chip comprising:

• a first power gating transistor connected to a first internal circuit and configured to provide a first power supply voltage to the first internal circuit;
• a second power gating transistor connected to a second internal circuit, different from the first internal circuit, and configured to provide a second power supply voltage to the second internal circuit;
• and
• a control circuit configured to control a switching operation of the first power gating transistor and the second power gating transistor,
• wherein
• a level of a voltage, provided to a body of the first power gating transistor, is different from a level of a voltage provided to a body of the second power gating transistor.

A power gating circuit comprising:

• a first power gating transistor disposed between an internal circuit and a ground voltage;
• a second power gating transistor disposed between the internal circuit and a power supply voltage;
• a gate bias generating circuit configured to provide a gate bias control signal to a gate of the first power gating transistor;
• and
• a body bias generating circuit configured to provide a body bias control signal to a body of the first power gating transistor,
• wherein
• when the first and second power gating transistors are turned on, the gate bias generating circuit and the body bias generating circuit provide the gate bias control signal having a positive voltage level and the body bias control signal having the positive voltage level, respectively, to the first power gating transistor, and
• when the first and power gating transistors are turned off, the gate bias generating circuit provides the gate bias control signal, having a ground voltage level or a negative voltage level, and the body bias generating circuit provides the body bias control signal, having the ground voltage level or the negative voltage level, respectively, to the first power gating transistor.