Semiconductor integrated circuit and semiconductor memory device

A semiconductor integrated circuit comprising

• an input circuit that includes an amplifier, wherein
• the amplifier includes:
• a current source electrically connected to a power supply voltage;
• a first PMOS transistor having a gate electrically connected to a first node that inputs a data signal, a source electrically connected to the current source, and a drain electrically connected to a second node;
• a second PMOS transistor having a gate electrically connected to a third node that inputs a reference signal, a source electrically connected to the current source, and a drain electrically connected to a fourth node;
• a load circuit electrically connected between the second node and a ground voltage and between the fourth node and the ground voltage;
• a first NMOS transistor having a gate electrically connected to the first node, a drain electrically connected to the power supply voltage, and a source electrically connected to the fourth node;
• a second NMOS transistor having a gate electrically connected to the third node, a drain electrically connected to the power supply voltage, and a source electrically connected to the second node;
• a first current restriction circuit electrically connected between the drain of the first NMOS transistor and the power supply voltage;
• and
• a second current restriction circuit electrically connected between the drain of the second NMOS transistor and the power supply voltage.