Power stealing using a current transformer
AssigneeTexas Instruments Incorporated
InventorsNavaneeth Kumar NARAYANASAMY, Manu BALAKRISHNAN
Life of this patent
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Abstract
A circuit includes a first rectifier having a first rectifier input and a first rectifier output. The circuit also includes a bridge circuit and a second rectifier. The bridge circuit is coupled to the first rectifier output. The bridge circuit has first, second, third, and fourth terminals. The first and second terminals are coupled to the first rectifier output, and the third and fourth terminals are adapted to be coupled to a primary winding of a transformer. The second rectifier has a second rectifier input and a second rectifier output. The second rectifier input is adapted to be coupled to a secondary winding of the transformer.
Claims12
A circuit, comprising:
- a first gate driver having a first gate driver input and a first gate driver output, wherein the first gate driver output is adaptable to be coupled to a first transistor;
- a second gate driver having a second gate driver input and a second gate driver output, wherein the second gate driver output is adaptable to be coupled to a second transistor;
- a third gate driver having a third gate driver input and a third gate driver output, wherein the third gate driver output is adaptable to be coupled to a third transistor;
- a fourth gate driver having a fourth gate driver input and a fourth gate driver output, wherein the fourth gate driver adaptable to be coupled to a fourth transistor;
- and
- a pulse width modulation (PWM) controller having first, second, third, and fourth PWM outputs coupled to respective first, second, third, and fourth gate driver inputs, wherein the PWM controller provides respective first, second, third, and fourth gate signals at the first, second, third, and fourth PWM outputs, respectively, in a repeating pattern that includes:
- a first pattern portion wherein the second and third PWM outputs are asserted and the first and fourth PWM outputs are deasserted;
- a second pattern portion in which the first and second PWM outputs are asserted and the third and fourth PWM outputs are deasserted;
- a third pattern portion in which the first and fourth PWM outputs are asserted and the second and third PWM outputs are deasserted;
- and
- a fourth pattern portion in which the third and fourth PWM outputs are asserted and the first and second gate signals are deasserted.
A system, comprising:
- a transformer;
- a transistor bridge circuit including first, second, third and fourth transistors, wherein the transistor bridge circuit is coupled to the transformer;
- first, second, third and fourth gate drivers, each respective gate driver coupled to a respective transistor of the first, second, third and fourth transistors;
- a pulse width modulation (PWM) controller having PWM outputs coupled to a respective gate driver of the first, second, third and fourth gate drivers, wherein the PWM controller is configured to implement a repeating pattern, the repeating pattern including:
- a first pattern portion in which a first pair of the gate drivers is activated to cause current to flow through the transformer;
- a second pattern portion in which a second pair of the gate drivers is activated without current flowing through the transformer;
- a third pattern portion in which a third pair of the gate drivers is activated to cause current to flow through the transformer;
- and
- a fourth pattern portion in which a fourth pair of the gate drivers is activated without current flowing through the transformer;
- and
- a current limit circuit having a current limit circuit input and a current limit circuit output, wherein the current limit circuit output is coupled to the gate drivers, and the current limit circuit is configurable to provide a current limit signal at the current limit circuit output responsive to current through the transistor bridge circuit exceeding a threshold.
Dependencies are inferred from the claim text.