Semiconductor integrated circuit, layout design system, layout designing method, and non-transitory computer-readable storage medium storing program

A layout design system comprising:

• a logic synthesis unit configured to perform logic synthesis of cell connection information on the basis of information stored in a circuit description unit and a cell library;
• and
• a layout design tool unit comprising an automatic wiring connection unit, a cell extraction unit, and a cell replacement unit, wherein:
• the automatic wiring connection unit is configured to perform automatic wiring connection of a cell on the basis of the cell connection information and the information stored in the cell library;
• the cell extraction unit is configured to extract a configuration of a cell using a plurality of block circuits;
• and
• the cell replacement unit, when there is a signal commonly supplied into the plurality of extracted block circuits, is configured to read information of a first standard cell from the cell library, to replace the configuration of the cell using the plurality of block circuits with the first standard cell, and to provide chip layout information.

A layout design method used for a layout design system, the layout design method comprising:

• performing logic synthesis of cell connection information on the basis of information stored in a circuit description unit and a cell library;
• performing automatic wiring connection of the cell on the basis of the cell connection information and the information stored in the cell library;
• extracting, by a cell extraction unit, a configuration of the cell using a plurality of block circuits;
• and
• when there is a signal commonly supplied into the plurality of extracted block circuits, reading information of a first standard cell from the cell library, replacing the configuration of the cell using the plurality of block circuits with the first standard cell, and providing chip layout information.

A non-transitory computer-readable medium in which a computer program is stored, the computer program being executed by a computer used for a layout design system, the computer program comprising:

• performing logic synthesis of cell connection information on the basis of information stored in a circuit description unit and a cell library;
• performing automatic wiring connection of the cell on the basis of the cell connection information and the information stored in the cell library;
• extracting a configuration of the cell using a plurality of block circuits;
• and
• when there is a signal commonly supplied into the plurality of extracted block circuits, reading information of a first standard cell from the cell library, replacing the configuration of the cell using the plurality of block circuits with the first standard cell, and providing chip layout information.