Stacked semiconductor device and method of fabricating the same

A method of fabricating a stacked semiconductor device, comprising:

• forming a plurality of first chips on a first semiconductor wafer by:
• forming first type through vias and second type through vias over a first wafer substrate;
• forming an internal wire layer disposed on and electrically connected to the first type through vias and the second type through vias, wherein the first type through vias, the second type through vias and the internal wire layer are formed through a first group of photomasks;
• forming a redistribution line disposed on and electrically connected to the second type through vias and the internal wire layer, wherein the redistribution line extends from a top surface of the second type through vias to a position non-overlapped with the second type through vias;
• and
• forming a plurality of conductive pins disposed on and electrically connected to the redistribution line, wherein the redistribution line and the plurality of conductive pins are formed through a second group of photomasks;
• dicing the first semiconductor wafer to separate out an array of first chips from the plurality of first chips;
• forming a plurality of second chips on a second semiconductor wafer, wherein the second chips comprise a plurality of connection pins;
• dicing the second semiconductor wafer to separate out a second chip from the plurality of second chips;
• and
• bonding the array of first chips to the second chip by electrically connecting the plurality of conductive pins to the plurality of connection pins.