Backside power distribution network substrate using a lattice matched etch stop layer
AssigneeInternational Business Machines Corporation
InventorsAlexander Reznicek, Tsung-Sheng Kang, Daniel Schmidt, Ruilong Xie
Life of this patent
Estimating the term…
Abstract
A semiconductor structure includes a lattice matched etch stop layer disposed on a silicon substrate layer. The lattice matched etch stop layer is lattice matched to the silicon substrate layer. The semiconductor structure further includes an epitaxial silicon layer disposed on the lattice matched etch stop layer, a front-end-of-the-line device layer disposed on the epitaxial silicon layer, a back-end-of-the-line device layer disposed on the front-end-of-the-line device layer, and a carrier wafer disposed on the back-end-of-the-line device layer.
Claims20
A semiconductor structure, comprising:
- a lattice matched etch stop layer disposed on a silicon substrate layer, wherein the lattice matched etch stop layer is lattice matched to the silicon substrate layer;
- an epitaxial silicon layer disposed on the lattice matched etch stop layer;
- a front-end-of-the-line device layer disposed on the epitaxial silicon layer;
- a back-end-of-the-line device layer disposed on the front-end-of-the-line device layer;
- and
- a carrier wafer disposed on the back-end-of-the-line device layer.
A semiconductor structure, comprising:
- an epitaxial silicon layer free of crystalline defects;
- and
- a backside power distribution network disposed on the epitaxial silicon layer.
A method, comprising:
- forming a lattice matched etch stop layer on a silicon substrate layer, wherein the lattice matched etch stop layer is lattice matched to the silicon substrate layer, epitaxially growing a silicon layer on the lattice matched etch stop layer;
- forming a front-end-of-the-line device layer on the epitaxially grown silicon layer;
- forming a back-end-of-the-line device layer on the front-end-of-the-line device layer;
- and
- forming a carrier wafer on the back-end-of-the-line device layer to form a semiconductor structure.
Dependencies are inferred from the claim text.