Semiconductor package and method of manufacturing the same

A semiconductor package, comprising:

• a redistribution substrate having a first surface and a second surface opposite to each other, and including a plurality of insulating layers and a plurality of redistribution layers disposed among the plurality of insulating layers, the plurality of redistribution layers electrically connected to each other;
• at least one semiconductor chip disposed on the first surface of the redistribution substrate and having a plurality of contact pads electrically connected to the plurality of redistribution layers;
• a protective insulating layer including a photosensitive insulating layer disposed on the second surface of the redistribution substrate and having a plurality of contact holes, and a non-photosensitive insulating layer buried in the photosensitive insulating layer, wherein the non-photosensitive insulating layer is provided as an outer surface of the protective insulating layer;
• and
• a plurality of under bump metallurgy (UBM) connectors each including a UBM pad disposed on the protective insulating layer and a UBM via disposed in a respective contact hole of the plurality of contact holes and electrically connected to the plurality of redistribution layers,
• wherein for each UBM via, the photosensitive insulating layer has a portion disposed between the UBM via and the non-photosensitive insulating layer in a direction parallel to the first surface of the redistribution substrate.

A semiconductor package, comprising:

• a redistribution substrate having a first surface and a second surface opposite to each other, and including a plurality of first photosensitive insulating layers and a plurality of redistribution layers disposed among the plurality of first photosensitive insulating layers;
• at least one semiconductor chip disposed on the first surface of the redistribution substrate and including a plurality of contact pads electrically connected to the plurality of redistribution layers;
• a protective insulating layer having a first surface facing the second surface of the redistribution substrate and a second surface opposite the first surface, and including a second photosensitive insulating layer disposed on the second surface of the redistribution substrate and having a plurality of contact holes, and a non-photosensitive insulating layer disposed at an outer surface of the second photosensitive insulating layer to form the second surface of the protective insulating layer;
• and
• a plurality of under bump metallurgy (UBM) connectors each having a UBM pad disposed on the protective insulating layer and a UBM via disposed in a respective contact hole of the plurality of contact holes and electrically connected to a redistribution signal line of the plurality of redistribution layers,
• wherein the non-photosensitive insulating layer contacts each UBM pad.