Semiconductor device

A semiconductor package comprising:

• a first redistribution structure having at least one first redistribution layer and at least one first insulating layer that are alternately stacked;
• a semiconductor chip electrically connected to the first redistribution structure;
• a second insulating layer disposed above the semiconductor chip and having an opening;
• a pad electrically connected to the first redistribution structure, disposed on the second insulating layer, and overlapping the opening;
• and
• a pad surface layer disposed on a first region of an upper surface of the pad to overlap the opening, the pad surface layer formed of a first conductive material different from a second conductive material forming the pad,
• wherein the pad further has a conductive via protruding from a lower surface of the pad and overlapping the pad surface layer in a vertical direction, and
• the pad further has an anchor portion disposed along an edge of the pad, the anchor portion having a form of a sawtooth inserted into the second insulating layer.

A semiconductor package comprising:

• a first redistribution structure having at least one first redistribution layer and at least one first insulating layer that are alternately stacked;
• a semiconductor chip disposed between the first redistribution structure and the second insulating layer;
• a second insulating layer disposed above the semiconductor chip and having an opening;
• a pad electrically connected to the first redistribution structure, disposed on the second insulating layer, and overlapping the opening;
• a first pad surface layer disposed on a first region of an upper surface of the pad to overlap the opening, the first pad surface formed of nickel (Ni) or an alloy of nickel;
• a second pad surface layer disposed on an upper surface of the first pad surface layer and overlapping the opening, the second pad surface layer formed of gold (Au) or an alloy of gold;
• and
• an encapsulant disposed between the first redistribution structure and the second insulating layer, the encapsulant encapsulating the semiconductor chip,
• wherein the pad has an anchor portion protruding from a second region of the upper surface of the pad,
• the anchor portion protrudes to a position higher than that of a lower surface of the first pad surface layer, and
• a portion of the second insulating layer is disposed in a space between the anchor portion and the first pad surface layer.