Semiconductor package including semiconductor chip having through-electrode

A semiconductor package comprising:

• a first semiconductor chip including a first active surface;
• a second semiconductor chip including a second active surface in contact with the first active surface, the second semiconductor chip including a substrate including front and rear surfaces and through-electrodes passing through the substrate and having protrusions protruding from the rear surface of the substrate;
• a redistribution layer disposed below the second semiconductor chip and electrically connected to the second semiconductor chip;
• vias disposed between the redistribution layer and the first semiconductor chip and disposed around the second semiconductor chip;
• and
• an encapsulant surrounding the second semiconductor chip, the redistribution layer, and the vias,
• wherein the encapsulant is in contact with the protrusions of the through-electrodes.

A semiconductor package comprising:

• a first semiconductor chip including a first bonding layer;
• a second semiconductor chip disposed below the first semiconductor chip and including a substrate having front and rear surfaces, a second bonding layer disposed on the front surface, and through-electrodes passing through the substrate and having protrusions protruding from the rear surface;
• chip connection terminals disposed on the first semiconductor chip and connecting the first semiconductor chip to the second semiconductor chip;
• a redistribution layer disposed below the second semiconductor chip and electrically connected to the second semiconductor chip;
• vias disposed between the redistribution layer and the first semiconductor chip and disposed around the second semiconductor chip;
• and
• an encapsulant surrounding the second semiconductor chip, the redistribution layer, and the vias,
• wherein the encapsulant is in contact with the protrusions of the through-electrodes.