Residue-free metal gate cutting for fin-like field effect transistor

A device comprising:

• a first fin structure and a second fin structure disposed over a substrate;
• a dielectric isolation structure disposed on the substrate and extending from the first fin structure to the second fin structure;
• a first dielectric layer disposed directly on the first fin structure and the second fin structure;
• a barrier layer disposed directly on the first dielectric layer;
• a hard mask layer disposed directly on the barrier layer;
• and
• a second dielectric layer extending through the hard mask layer, the barrier layer, the first dielectric layer and a portion of the dielectric isolation structure, wherein the second dielectric layer is formed of a different material than the first dielectric layer, and wherein the second dielectric layer interfaces with a sidewall surface and a top surface of the hard mask layer, the top surface of the hard mask layer facing away from the substrate.

A device comprising:

• a first fin structure disposed on a substrate;
• a dielectric isolation structure disposed on the substrate, the first fin structure at least partially embedded in the dielectric isolation structure;
• a first gate structure and a second gate structure disposed on the first fin structure, the first gate structure spaced apart from the second gate structure;
• a first dielectric layer disposed on and interfacing with the first gate structure, the second gate structure and the dielectric isolation structure;
• a first nitride layer interfacing with the first dielectric layer;
• a second nitride layer disposed on the first nitride layer, the second nitride layer having a different material composition than the first nitride layer;
• and
• a second dielectric layer extending through the second nitride layer, the first nitride layer, the first dielectric layer and a portion of the dielectric isolation structure, wherein the second dielectric layer is formed of a different material than the first dielectric layer, wherein the second dielectric layer includes a first portion extending between the first and second gate structures and a second portion extending over the first and second gate structures, and wherein the first portion of the second dielectric layer has a first width and the second portion of the second dielectric layer has a second width that is different than the first width.