Multi-layer chip architecture and fabrication
AssigneeGoogle Inc.
InventorsZhimin Jamie Yao, Michael C. Hamilton, Marissa Giustina, Brian James Burkett, Theodore Charles White, Ofer Naaman
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Abstract
A method includes providing a first chip having a circuit element layer stack, the circuit element layer stack including a plurality of circuit elements distributed across a plurality of layers. The circuit element layer stack has a sacrificial material filling a space between the plurality of circuit elements in the plurality of layers and a coherent device layer disposed on the circuit element layer stack. The method includes removing the sacrificial material.
Claims27
A method comprising:
- providing a first chip having
- a circuit element layer stack, the circuit element layer stack comprising
- a plurality of circuit elements distributed across a plurality of layers, and
- a sacrificial material filling a space between the plurality of circuit elements in the plurality of layers, and
- a coherent device layer disposed on the circuit element layer stack;
- and
- removing the sacrificial material.
An apparatus comprising a first chip, the first chip comprising:
- a substrate,
- a circuit element layer stack disposed on the substrate, the circuit element layer stack comprising:
- a plurality of circuit elements distributed across a plurality of layers, and
- a first mechanical support structure extending vertically from a surface of the substrate through two or more layers of the circuit element layer stack, wherein a space between the plurality of circuit elements includes a vacuum;
- and
- a coherent device layer disposed on the circuit element layer stack.
Dependencies are inferred from the claim text.