Method for manufacturing mask pattern and method for manufacturing semiconductor device using the mask pattern

A method for manufacturing a semiconductor device, the method comprising:

• forming an upper pattern layer on a substrate, the upper pattern layer including at least one channel layer and at least one sacrificial layer that are alternately stacked on the substrate,
• forming a mold mask layer on the upper pattern layer,
• forming a first upper mold mask pattern on the mold mask layer, the first upper mold mask pattern including a first mold opening extending in a first direction, the first mold opening having a first width in a second direction crossing the first direction;
• forming a pre-mold mask pattern that includes a first trench, by etching the mold mask layer using the first upper mold mask pattern;
• forming a second upper mold mask pattern on the pre-mold mask pattern, the second upper mold mask pattern including a second mold opening extending in the first direction, the second mold opening having a second width different from the first width in the second direction, the second mold opening overlapping a portion of the first trench in a third direction that is a thickness direction of the substrate;
• forming a mold mask pattern that includes a second trench connected to the first trench, by etching the pre-mold mask pattern using the second upper mold mask pattern;
• forming a process mask pattern in the mold mask pattern, the process mask pattern fills the first trench and the second trench;
• and
• forming a lower pattern and an upper pattern structure extending in the first direction, by using the process mask pattern,
• wherein the lower pattern and the upper pattern structure are formed by etching a portion of the substrate and the upper pattern layer.

A method for manufacturing a semiconductor device, the method comprising:

• forming an upper pattern layer on a substrate, the upper pattern layer including at least one channel layer and at least one sacrificial layer that are alternately stacked on the substrate;
• forming a mold mask pattern on the upper pattern layer, the mold mask pattern including a connection trench extending in a first direction, the connection trench including a first trench having a first width in a second direction crossing the first direction and a second trench having a second width in the second direction;
• forming a process mask pattern in the mold mask pattern, the process mask pattern filling the connection trench;
• forming a lower pattern and an upper pattern structure that extend in the first direction, by using the process mask pattern as an etching mask after removing the mold mask pattern, the upper pattern structure including at least one channel pattern and at least one sacrificial pattern, that are alternately stacked on the lower pattern;
• forming a dummy gate electrode on the upper pattern structure, the dummy gate electrode extending in the second direction;
• forming a source/drain pattern on the lower pattern, the source/drain pattern is connected to the at least one channel pattern;
• and
• forming a sheet pattern connected to the source/drain pattern by removing the at least one sacrificial pattern after forming the source/drain pattern.