Method for controlling nand flash memory to complete neural network operation

Abstract

The present invention provides a method for controlling a NAND flash memory to complete neural network operation, including the following steps: providing a NAND flash memory, where the NAND flash memory includes multiple memory blocks and multiple page buffers, the memory block includes multiple synaptic strings, multiple bit lines, and multiple word lines, the synaptic string includes multiple memory cells connected in series, the synaptic strings are connected to the bit lines in one-to-one correspondence, the word line is connected to all the synaptic strings, the page buffer is connected to all the memory blocks, and one of the bit lines is merely connected to one of the page buffers; writing weight data into the memory cell according to a relationship between the weight data and the feature data; applying a target voltage to the memory cell by the word line; and sensing, by the page buffer, a current of the memory block, to obtain a convolution result. Thus, the neural network operation is achieved using a generic NAND flash memory.

Dependencies are inferred from the claim text.