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US 2024/0194240 A1Published application
Memory device
AssigneeNanya Technology Corporation
InventorChih-Jen Chen
Life of this patent
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Abstract
The memory device of the disclosure includes a fuse voltage generator, a fuse storage and a logic circuit. The fuse voltage generator generates a fuse voltage in response to an enable signal having a first logic level, and stop generating the fuse voltage in response to the enable signal having a second logic level. The fuse storage storages a setting data of the memory device. The fuse storage outputs the setting data in response to the fuse voltage. The logic circuit generates the enable signal in response to at least two operating signals.
Claims12
A memory device, comprising:
- a fuse voltage generator, configured to generate a fuse voltage in response to an enable signal having a first logic level, and stop generating the fuse voltage in response to the enable signal having a second logic level;
- a fuse storage, coupled to the fuse voltage generator, configured to storage a setting data of the memory device, and output the setting data in response to the fuse voltage;
- and
- a logic circuit, coupled to the fuse voltage generator, configured to determine a logic level of the enable signal in response to at least two operating signals.
1 more element
Dependencies are inferred from the claim text.