Method and system for designing layout of integrated circuit
AssigneeSamsung Electronics Co., Ltd.
InventorSunghoon LEE
Life of this patent
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Abstract
A method of designing a layout of an integrated circuit includes generating floorplan data by performing floorplan based on input data for the integrated circuit, searching for a path between a first point and a second point, which are specified, the searching based on the floorplan data, and positioning components of the layout based on a result of the searching. The searching for the path includes distinguishing based on the floorplan data a first region where routing is possible from a second region where the routing is not possible, receiving position data on the first point and the second point, and searching for a shortest path between the first point and the second point, on the first region.
Claims20
A method of designing a layout of an integrated circuit, the method comprising:
- generating floorplan data by performing a floorplan operation based on input data for the integrated circuit;
- searching for a path between a first point and a second point, which are specified, based on the floorplan data;
- and
- positioning components of the layout based on a result of the searching,
- wherein the searching for the path comprises,
- distinguishing a first region, where routing is possible, from a second region, where the routing is not possible, the distinguishing based on the floorplan data,
- receiving position data on the first point and the second point, and
- searching for a shortest path between the first point and the second point, in the first region.
A method of designing a layout of an integrated circuit, the method comprising:
- receiving physical data including physical information about the integrated circuit, for input data on the integrated circuit;
- distinguishing a first region, where routing is possible, from a second region, where the routing is not possible, based on the physical data;
- receiving position information about a first point and a second point, which are specified;
- and
- searching for a shortest path between the first point and the second point, in the first region.
A system configured to design a semiconductor chip, the system comprising:
- a processor;
- and
- a memory connected to the processor and storing machine-readable commands that, when executed by the processor, cause the system to perform a wiring path search operation for designing the semiconductor chip,
- wherein, by using the commands, the processor is configured to,
- receive physical information about design exchange format (DEF) data of the semiconductor chip and to receive physical information about library exchange format (LEF) data of the semiconductor chip,
- based on the physical information, distinguish a first region, where routing is possible, from a second region, where the routing is impossible in the semiconductor chip,
- generate an array having a size corresponding to a size of the semiconductor chip,
- represent a first component group including components of the array corresponding to the first region and a second component group including components of the array corresponding to the second region,
- receive position information about a first point and a second point, which are specified, and
- search for a shortest path between the first point and the second point in the first component group.
Dependencies are inferred from the claim text.