Electro-mechanical multi-board assembly and placement collaboration

An apparatus comprising at least one computer-readable memory device storing instructions configured to cause one or more processing devices to perform operations comprising:

• distributing virtual product models to multiple printed circuit board layout tools, wherein the virtual product models each correspond to a shared product model describing a product having an electronic device with multiple printed circuit boards, wherein the printed circuit board layout tools are configured to separately modify the corresponding virtual product models to generate layout designs for the multiple print circuit boards in the product and to generate at least one system-level design rule describing a physical limitation for the electronic device based on a constraint in at least one of the layout designs for the multiple print circuit boards;
• updating the shared product model based, at least in part, on the modifications to at least one of the virtual product models by the printed circuit board layout tools;
• and
• transmitting a notification to at least one of the printed circuit board layout tools when the updated shared product model conflicts with the physical limitation for the electronic device described in the at least one system-level design rule.

A system comprising:

• a memory device configured to store machine-readable instructions;
• and
• a computing system including one or more processing devices, in response to executing the machine-readable instructions, configured to
• distribute virtual product models to multiple printed circuit board layout tools, wherein the virtual product models each correspond to a shared product model describing a product having an electronic device with multiple printed circuit boards, wherein the printed circuit board layout tools are configured to separately modify the corresponding virtual product models to generate layout designs for the multiple print circuit boards in the product and to generate at least one system-level design rule describing a physical limitation for the electronic device based on a constraint in at least one of the layout designs for the multiple print circuit boards;
• update the shared product model based, at least in part, on the modifications to at least one of the virtual product models by the printed circuit board layout tools;
• and
• transmit a notification to at least one of the printed circuit board layout tools when the updated shared product model conflicts with the physical limitation for the electronic device described in the at least one system-level design rule.