Dynamic hardware integrity and/or replay protection

A method comprising:

• decoding a single instruction, the single instruction to include:
• a field for an opcode, the opcode to indicate that execution of the single instruction is to at least indicate to at least one memory security engine to configure an integrity based metadata organization region of memory, wherein in the integrity based metadata organization region of memory a dataline is to be stored with a set of metadata that includes a message authentication code and a first proper subset of an error correction code and a second, different proper subset of an error correction code associated with the dataline is to be stored in memory that is sequestered from the dataline and the set of metadata, and
• at least field that is at least one of:
• an identifier of at least one operand location that is to store an indication of the region of memory that is to be organized according to the integrity based metadata organization and
• an immediate that is to encode an indication of a region of memory that is to be organized according to the integrity based metadata organization;
• and
• executing the decoded single instruction according to the opcode.

A system comprising:

• a processor comprising:
• at least one memory security engine;
• decoder circuitry to decode a single instruction, the single instruction to include:
• a field for an opcode, the opcode to indicate that execution circuitry is to at least indicate to the at least one memory security engine to configure an integrity based metadata organization region of memory, wherein in the integrity based metadata organization region of memory a dataline is to be stored with a set of metadata that includes a message authentication code and a first proper subset of an error correction code and a second, different proper subset of an error correction code associated with the dataline is to be stored in memory that is sequestered from the dataline and the set of metadata, and
• at least one field that is at least one of:
• an identifier of at least one operand location that is to store an indication of the region of memory that is to be organized according to the integrity based metadata organization and
• an immediate that is to encode an indication of a region of memory that is to be organized according to the integrity based metadata organization;
• and
• the execution circuitry to execute the decoded single instruction according to the opcode;
• and
• the memory coupled to the processor to be organized according to the integrity based metadata organization.