Data Storage Device with Memory Services based on Storage Capacity
AssigneeMicron Technology, Inc.
InventorLuca Bert
Life of this patent
Estimating the term…
Abstract
A memory sub-system having a paging system to provide memory services over a connection from its host interface to a host system. The connection can support both a storage access protocol and a cache coherent memory access protocol. The memory sub-system can have a non-volatile memory to provide a storage capacity and a fast, volatile memory to cache active pages of a memory space provided by a memory device attached by the memory sub-system over the connection to the host system. The memory space can be configured in a namespace of the storage capacity of the non-volatile memory. Optionally, the memory space can be configured for access both via the storage access protocol using logical block addresses and via the cache coherent memory access protocol using memory addresses.
Claims20
A method, comprising:
- attaching, by a memory sub-system over a connection from a host interface of the memory sub-system to a host system, a memory device having a memory space configured in first memory of the memory sub-system;
- attaching, by the memory sub-system over the connection from the host interface of the memory sub-system to the host system, a storage device having a storage space configured in the first memory of the memory sub-system;
- allocating, by the memory sub-system, an amount of second memory, faster than the first memory, to represent pages of the memory space in servicing memory requests in the memory space;
- managing, by the memory sub-system, an address map configured to identify correlations between pages of the second memory and corresponding pages of the memory space represented by the pages of the second memory;
- operating, by the memory sub-system, a first page of the second memory in response to a memory access request transmitted over the connection according to a cache coherent memory access protocol, the memory access request identifying a memory address in the memory space;
- and
- operating, by the memory sub-system, the first memory in response to a storage access request transmitted over the connection according to a storage access protocol, the storage access request identifying a logical block address in the storage space.
A memory sub-system, comprising:
- a host interface operable on a connection to a host system according to a storage access protocol and a cache coherent memory access protocol;
- a first memory configured to provide a non-volatile storage capacity of the memory sub-system;
- a second memory faster than the first memory;
- and
- a controller configured to:
- allocate a first page of the second memory to represent a second page in a memory space provided by a memory device attached by the memory sub-system to the host system over the connection;
- operate the first page of the second memory in response to a memory access request transmitted over the connection according to the cache coherent memory access protocol to the host interface, when the memory access request identifies a memory address in the memory space.
A non-transitory computer storage medium storing instructions which, when executed in a memory sub-system, cause the memory sub-system to perform a method, comprising:
- allocate a portion of a non-volatile storage capacity of the memory sub-system to a namespace;
- attach the namespace as a memory device to a host system over a connection between a host interface of the memory sub-system and the host system;
- and
- provide the host system with:
- storage access to the namespace using a storage access protocol over the connection;
- and
- memory access to a memory space, corresponding to the namespace, using a cache coherent memory access protocol over the connection.
Dependencies are inferred from the claim text.