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US 2024/0192879 A1Published application
Incomplete superblock management for memory systems
AssigneeMicron Technology, Inc.
InventorTomer Eliash
Life of this patent
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Abstract
Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide superblock management based on memory component reliabilities.
Claims20
A system comprising:
- a set of memory components of a memory sub-system;
- and
- a processing device operatively coupled to the set of memory components, the processing device being configured to perform operations comprising:
- determining that one or more blocks of an individual superblock fail to satisfy a reliability criterion;
- designating the individual superblock as an incomplete superblock;
- and
- performing one or more memory operations on a portion of one or more complete superblocks before the incomplete superblock.
4 more elements
A computerized method comprising:
- determining that one or more blocks of an individual superblock fail to satisfy a reliability criterion;
- designating the individual superblock as an incomplete superblock;
- and
- performing one or more memory operations on a portion of one or more complete superblocks before the incomplete superblock.
1 more element
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- determining that one or more blocks of an individual superblock fail to satisfy a reliability criterion;
- designating the individual superblock as an incomplete superblock;
- and
- performing one or more memory operations on a portion of one or more complete superblocks before the incomplete superblock.
1 more element
Dependencies are inferred from the claim text.