Back to results
US 2024/0192760 A1Published application
Technique for improving power state transition latency for computing device
AssigneeAdvanced Micro Devices, Inc.
InventorsDonny Yi, Karthik Rao
Life of this patent
Estimating the term…
Abstract
A disclosed technique includes in response to a trigger to power a functional element of a device to a lower power state, operating a set of backup state elements for the functional element in a lower power mode; and resuming operation of the functional element and the backup state elements in a higher power state.
Claims20
A method, comprising:
- in response to a trigger to power a functional element of a device to a lower power state, operating a set of backup state elements for the functional element in a lower power mode;
- and
- resuming operation of the functional element and the backup state elements in a higher power state.
A system, comprising:
- a functional element;
- a set of backup state elements of the functional element;
- and
- a power state controller configured to:
- in response to a trigger to power the functional element, operating the set of backup state elements for the functional element in a lower power mode;
- and
- resuming operation of the functional element and the backup state elements in a higher power state.
4 more elements
A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to perform operations comprising:
- in response to a trigger to power a functional element of a device to a lower power state, operating a set of backup state elements for the functional element in a lower power mode;
- and
- resuming operation of the functional element and the backup state elements in a higher power state.
Dependencies are inferred from the claim text.