# US 2024/0192718 A1 · Low noise bandgap reference architecture

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- Number: US 2024/0192718 A1
- Document ID: US20240192718A1
- Status: Published application
- Kind: A1
- Application number: 18/419,784
- Filed: 2024-01-23
- Published: 2024-06-13
- Earliest claimed: 2021-06-25
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Sanjeev Praphulla Chandra Nyshadham; Subrato Roy
- Web page: https://patentgrep.com/patent/US20240192718A1

## CPC

- G05F 3/267: {using both bipolar and field-effect technology}
- G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown}
- G05F 1/565: sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence)
- H03F 3/345: with field-effect devices (H03F3/347 takes precedence)
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H03F 2203/45116: Feedback coupled to the input of the differential amplifier
- H03F 2203/45136: One differential amplifier in IC-block form being shown
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H03F: AMPLIFIERS

## Abstract

In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.

## Claims

### Claim 1

A system comprising:
a power supply terminal;
a ground terminal;
a first circuit coupled to the power supply terminal and the ground terminal, the first circuit including an amplifier having a first input terminal, a second input terminal, and an output terminal; and
a second circuit including:
a first transistor having a first terminal, a second terminal, and a control terminal, wherein the second terminal of the first transistor is coupled to the output terminal of the amplifier;
a second transistor having a first terminal, a second terminal, and a control terminal, wherein the control terminal of the second transistor is coupled to the first terminal of the second transistor and the control terminal of the first transistor;
a first switch having a first terminal and a second terminal, wherein the first terminal of the first switch is coupled to the power supply terminal, and the second terminal of the first switch is coupled to the first terminal of the first transistor; and
a second switch having a first terminal and a second terminal, wherein the first terminal of the second switch is coupled to the control terminal of the first transistor and the control terminal of the second transistor, and a second terminal of the second switch is coupled to the ground terminal.

### Claim 2 (depends on 1)

The system of claim 1, wherein:
the first circuit further includes:
a first current mirror circuit coupled to the power supply terminal;
a first stage coupled to the first current mirror circuit;
a second stage coupled to the first stage and to the first current mirror circuit; and
a second current mirror circuit coupled to the first stage, the second stage, and the amplifier; and
the ground terminal is coupled to the second current mirror circuit.

### Claim 3 (depends on 2)

The system of claim 2, wherein:
the first current mirror circuit includes:
a third transistor having a first terminal, a second terminal coupled to the power supply terminal, and a control terminal; and
a fourth transistor having a first terminal coupled to the control terminal of the third transistor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the control terminal of the third transistor and the first terminal of the fourth transistor.

### Claim 4 (depends on 3)

The system of claim 3, wherein:
the first stage includes:
a fifth transistor having a first terminal, a second terminal coupled to the first terminal of the fourth transistor, and a control terminal;
a first resistor having a first terminal and a second terminal, the first terminal coupled to the first terminal of the fifth transistor; and
a second resistor having a first terminal and a second terminal, the first terminal coupled to the second terminal of the fifth transistor, and the second terminal coupled to the second terminal of the first resistor.

### Claim 5 (depends on 4)

The system of claim 4, wherein:
the second stage includes:
a sixth transistor having a first terminal coupled to the control terminal of the fifth transistor, a second terminal coupled to the first terminal of the fourth transistor, and a control terminal;
a third resistor having a first terminal and a second terminal, the first terminal coupled to the first terminal of the sixth transistor; and
a fourth resistor having a first terminal and a second terminal, the first terminal coupled to the second terminal of the sixth transistor, and the second terminal coupled to the second terminal of the third resistor.

### Claim 6 (depends on 5)

The system of claim 5, wherein:
the second terminal of the first resistor is coupled to the first input terminal of the amplifier; and
the control terminal of the sixth transistor is coupled to the second input terminal of the amplifier.

### Claim 7 (depends on 6)

The system of claim 6, wherein:
the second current mirror circuit includes:
a seventh transistor having a first terminal coupled to the first input terminal of the amplifier, and a second terminal coupled to the ground terminal; and
an eighth transistor having a first terminal coupled to the second input terminal of the amplifier, and a second terminal coupled to the ground terminal.

### Claim 8 (depends on 7)

The system of claim 7, wherein:
a width of the eighth transistor is m times a width of the seventh transistor; and
m equals 1.

### Claim 9 (depends on 7)

The system of claim 7, wherein:
a resistance of the third resistor is m times smaller than a resistance of the first resistor; and
m equals 1.

### Claim 10 (depends on 7)

The system of claim 7, wherein:
a resistance of the fourth resistor is m times smaller than a resistance of the second resistor; and
m equals 1.

### Claim 11 (depends on 7)

The system of claim 7, wherein:
the second circuit includes a ninth transistor including a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the ground terminal, and a control terminal coupled to the first terminal of the ninth transistor.

### Claim 12 (depends on 11)

The system of claim 11, wherein:
a current density of the ninth transistor is equal to a current density of the eighth transistor.

### Claim 13 (depends on 1)

The system of claim 1, wherein:
the second circuit includes a first current mirror circuit, a second current mirror circuit, a bandgap generator circuit, and a signal generator circuit.

### Claim 14 (depends on 13)

The system of claim 13, wherein:
the first current mirror circuit includes:
a tenth transistor having a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the power supply terminal, and a control terminal; and
an eleventh transistor having a first terminal coupled to the control terminal of the tenth transistor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the first terminal of the eleventh transistor.

### Claim 15 (depends on 14)

The system of claim 14, wherein:
the second current mirror circuit includes:
a twelfth transistor having a first terminal coupled to the first terminal of the eleventh transistor, a second terminal coupled to the ground terminal, and a control terminal; and
a thirteenth transistor having a first terminal, a second terminal coupled to the ground terminal, and a control terminal coupled to the control terminal of the twelfth transistor and the first terminal of the thirteenth transistor.

### Claim 16 (depends on 15)

The system of claim 15, wherein:
the bandgap generator circuit includes:
a fourteenth transistor having a first terminal, a second terminal coupled to the power supply terminal, and a control terminal coupled to the first terminal;
a fifth resistor having a first terminal coupled to the power supply terminal, and a second terminal;
a sixth resistor having a first terminal coupled to the first terminal of the fourteenth transistor, and a second terminal coupled to the second terminal of the fifth resistor;
a fifteenth transistor having a first terminal, a second terminal coupled to the power supply terminal, and a control terminal coupled to the second terminal of the fifth resistor and the second terminal of the sixth resistor;
a sixteenth transistor having a first terminal coupled to the control terminal of the thirteenth transistor, a second terminal coupled to the second terminal of the fifth resistor, and a control terminal coupled to the first terminal of the fifteenth transistor; and
a seventh resistor having a first terminal coupled to the control terminal of the sixteenth transistor.

### Claim 17 (depends on 16)

The system of claim 16, wherein:
the bandgap generator circuit includes:
a seventeenth transistor having a first terminal, a second terminal, and a control terminal;
an eighth resistor having a first terminal coupled to the power supply terminal, and a second terminal coupled to the second terminal of the seventeenth transistor;
a ninth resistor having a first terminal coupled to the control terminal of the seventeenth transistor; and
a eighteenth transistor having a first terminal coupled to the control terminal of the seventeenth transistor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the second terminal of the eighth resistor.

### Claim 18 (depends on 17)

The system of claim 17, wherein:
the signal generator circuit includes:
a logic gate having an input coupled to the first terminal of the seventeenth transistor;
a nineteenth transistor having a first terminal coupled to the first terminal of the seventeenth transistor, a second terminal, and a control terminal; and
a twentieth transistor having a first terminal coupled to the second terminal of the nineteenth transistor, a second terminal coupled to the ground terminal, and a control terminal.

### Claim 19 (depends on 17)

The system of claim 17, wherein:
a size of the fourteenth transistor is greater than a size of the fifteenth transistor.

### Claim 20 (depends on 17)

The system of claim 17, wherein:
the bandgap generator circuit includes a third switch having a first terminal coupled to the second terminal of the seventh resistor, and a second terminal coupled to the ground terminal.
