TESTING ADCs
AssigneeNordic Semiconductor ASA
InventorHenrik FON
Life of this patent
Estimating the term…
Abstract
A circuit portion is provided which is arranged to be operable in a test mode. The circuit portion includes a Successive Approximation Register Analog to Digital Converter, SAR ADC, and an input for a reference signal. The SAR ADC is arranged to generate a feedback signal having a duty cycle representing a time taken for the SAR ADC to complete an analogue to digital conversion. The SAR ADC can carry out a comparison of a duty cycle of the reference signal with the duty cycle of the feedback signal, and can generate an output signal comprising a digital representation of the comparison of the reference duty cycle and the feedback duty cycle.
Claims16
A circuit portion arranged to be operable in a test mode, comprising:
- an input for a reference signal;
- and
- a Successive Approximation Register Analog to Digital Converter (SAR ADC) arranged to:
- generate a feedback signal having a duty cycle representing a time taken for the SAR ADC to complete an analogue to digital conversion;
- carry out a comparison of a duty cycle of the reference signal with the duty cycle of the feedback signal;
- and
- generate an output signal comprising a digital representation of the comparison of the duty cycle of the reference signal and the duty cycle of the feedback signal.
A method for testing a Successive Approximation Register Analog to Digital Converter (SAR ADC), the method comprising the SAR ADC in a test mode:
- generating a feedback signal having a duty cycle representing a time taken for the SAR ADC to complete an analogue to digital conversion;
- carrying out a comparison of a duty cycle of the reference signal with the duty cycle of the feedback signal;
- and
- generating an output signal comprising a digital representation of the comparison of the duty cycle of the reference signal and the duty cycle of the feedback signal.
A circuit portion arranged to be operable in a test mode, comprising:
- a Successive Approximation Register Analog to Digital Converter (SAR ADC);
- and
- a power supply arranged to provide a supply voltage to the SAR ADC;
- wherein the circuit portion is arranged to measure a parameter indicative of a time taken for the SAR ADC to perform an analogue to digital conversion and set the supply voltage based on the measurement of said parameter.
(canceled)
Dependencies are inferred from the claim text.