Pipeline analog-to-digital converter and calibration method thereof

A pipeline analog-to-digital converter (ADC), comprising:

• an offset digital code generation circuit configured to generate an offset digital code;
• a first ADC configured to generate a first digital code according to an input voltage;
• a first digital-to-analog converter (DAC) configured to generate a first intermediate voltage according to the first digital code;
• a second DAC configured to generate an offset voltage according to a reference digital code and the offset digital code;
• a first adder circuit configured to generate a second intermediate voltage according to the input voltage, the first intermediate voltage, and the offset voltage;
• a residue amplifier configured to amplify the second intermediate voltage to generate a third intermediate voltage;
• a second ADC configured to generate a second digital code according to the third intermediate voltage;
• a correlation circuit configured to generate a plurality of intermediate gains according to the reference digital code and the second digital code;
• a digital gain determination circuit configured to select one of the intermediate gains as a digital gain according to the second digital code;
• and
• an output circuit configured to generate an output digital code according to the first digital code, the reference digital code, the offset digital code, the second digital code, and the digital gain.

A method of calibrating a pipeline analog-to-digital converter (ADC) that comprises a residue amplifier, the method comprising:

• (A) generating an offset voltage;
• (B) adjusting a first input voltage of the residue amplifier according to the offset voltage and a reference digital code;
• (C) converting an output voltage of the residue amplifier into a second digital code;
• (D) performing a correlation operation on the reference digital code and the second digital code to generate an intermediate gain;
• (E) recording the intermediate gain;
• (F) repeating steps (A) to (E) to record a plurality of intermediate gains;
• (G) selecting one of the intermediate gains as a digital gain according to the second digital code;
• and
• (H) generating an output digital code according to a first digital code, the reference digital code, the digital gain, and the second digital code.