Asic chip for performing active battery equalization

An ASIC chip for performing active battery equalization, comprising:

• a power conversion module, an equalization switch matrix circuit module, a switch control module, a temperature protection module, and a communication interface module;
• wherein
• the equalization switch matrix circuit module comprises a power MOS transistor, a first terminal of the equalization switch matrix circuit module is connected to an input terminal of a battery pack, a second terminal of the equalization switch matrix circuit module is connected to an active equalization power supply, a third terminal of the equalization switch matrix circuit module is connected to the temperature protection module, a fourth terminal of the equalization switch matrix circuit module is connected to the switch control module, the battery pack comprises n batteries connected in series, wherein n>1 and n is a positive integer;
• a positive pole of an n-th battery in the battery pack is connected to an input terminal of the power conversion module, a high-voltage output terminal of the power conversion module is connected to the equalization switch matrix circuit module and the switch control module, and a low-voltage output terminal of the power conversion module is connected to the temperature protection module and the communication interface module;
• the equalization switch matrix circuit module is configured to perform equalization on a battery in the battery pack, the switch control module is configured to control a switching state of the power MOS transistor in the equalization switch matrix circuit module, the temperature protection module is configured to perform temperature protection on the power MOS transistor in the equalization switch matrix circuit module, and the communication interface module is configured to perform communication with an external system;
• the switch control module comprises:
• a signal output unit, a signal interface unit, and a plurality of control units;
• an output terminal of the signal output unit is connected to an input terminal of the signal interface unit, an output terminal of the signal interface unit is connected to an input terminal of the control units, an output terminal of a control unit corresponds to an output terminal of the signal interface unit, and an output terminal of the control unit is connected to a gate of the power MOS transistor in the equalization switch matrix circuit module;
• a first input terminal of the signal output unit is connected to the communication interface module, and a second input terminal of the signal output unit is connected to the temperature protection module;
• and
• the signal output unit is configured to output a first control signal for controlling operation states of the control units, and the control units are configured to output a second control signal for controlling an operation state of the power MOS transistor in the equalization switch matrix circuit module based on the first control signal.