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US 2024/0178097 A1Published application
Permanent layer for bump chip attach
AssigneeIntel Corporation
InventorsFrederick Atadana, Jean Bosco Kana Kana, Shripad Gokhale, Xavier F. Brun
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Abstract
Disclosed herein are microelectronics package architectures utilizing glass layers and methods of manufacturing the same. The microelectronics packages may include a silicon layer, dies, and a glass layer. The silicon layer may include vias. The dies may be in electrical communication with vias. The glass layer may include interconnects in electrical communication with the vias.
Claims24
A microelectronics package comprising:
- a silicon layer comprising:
- a first subset of through vias, and
- a second subset of through vias;
- a first die in electrical communication with the first subset of through vias;
- a second die in electrical communication with the second subset of through vias;
- and
- a glass layer comprising interconnects in electrical communication with the first and second subsets of through vias.
4 more elements
A microelectronics package comprising:
- a silicon layer comprising through silicon vias;
- a dummy routing trace in the silicon layer;
- a plurality of dies, each of the plurality of dies in electrically coupled with the respective ones of the through silicon vias, at least one of the plurality of dies electrically coupled to the dummy routing trace;
- and
- a glass layer comprising interconnects in electrical communication with the through silicon vias.
2 more elements
A method of manufacturing a microelectronics package, the method comprising:
- forming in interconnects on a surface of a glass layer;
- attaching a silicon layer having through vias to the glass layer with the interconnects in electrical communication with the through vias;
- attaching dies to the silicon layer;
- and
- forming a mold layer that encapsulates the dies and is in contact with the silicon layer.
2 more elements
Dependencies are inferred from the claim text.