Test circuit of semiconductor apparatus and test system including the same
AssigneeSK hynix Inc.
InventorsJong Seok JUNG, Chan Keun KWON, Jong Seok KIM, Young Kwan LEE
Life of this patent
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Abstract
A test circuit of a semiconductor apparatus includes a first resistor, a second resistor and a feed-back loop circuit. The first resistor is coupled between a pad and a test element. The second resistor is coupled to the first resistor in a parallel manner. The feed-back loop circuit is configured to feed a result back to the second resistor, the result being one of comparing a first voltage and a second voltage with each other, the first voltage and the second voltage being applied respectively to the first resistor and the second resistor.
Claims16
A test circuit of a semiconductor apparatus, the test circuit comprising:
- first and second resistors coupled in parallel to a pad;
- a test element serially coupled in series to the first resistor;
- and
- a feed-back loop circuit configured to feed a result back by using the second resistor, the result being obtained by comparing a first voltage applied to the first resistor and a second voltage applied to the second resistor.
A test circuit of a semiconductor apparatus, the test circuit comprising:
- a plurality of test-target elements;
- a first signal path configured to provide a voltage applied to a first pad, to a first test-target element selected from among the plurality of test-target elements;
- a current dividing circuit configured to divide a current through a second signal path and a third signal path, the current being caused by a voltage applied to a second pad;
- and
- a feed-back loop circuit configured to feed a result back by using the third signal path, the result being obtained by comparing a first voltage corresponding to the second signal path and a second voltage corresponding to the third signal path.
A test circuit of a semiconductor apparatus, the test circuit comprising:
- a plurality of test-target elements;
- a first demultiplexer configured to provide a voltage which is applied to a first pad, to a first node of a first test-target element selected from among the plurality of test-target elements;
- a first resistor coupled to a second pad;
- a second demultiplexer configured to provide a voltage which is applied to the first resistor, to a second node of the first test-target element;
- a second resistor coupled to the second pad in parallel with the first resistor;
- and
- a feed-back loop circuit configured to feed a result back to the second resistor, the result being obtained by comparing a first voltage applied to the first resistor and a second voltage applied to the second resistor.
A test system comprising:
- a test equipment configured to perform a test by applying a voltage through a first pad and by monitoring a current that flows through a second pad according to the voltage;
- a semiconductor die to be tested, including a test circuit;
- wherein the test circuit comprises:
- a first resistor coupled between a plurality of test-target elements and the second pad;
- and
- a second resistor coupled to the second pad in parallel with the first resistor,
- wherein the test circuit is configured to feed a result back by using the second resistor, the result being obtained by comparing a first voltage applied to the first resistor and a second voltage applied to the second resistor.
Dependencies are inferred from the claim text.