Method and structure for finfet device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Ching, Ying-Keung Leung
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Abstract
The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench positioned between the first and second fin structures. The method also includes forming a first dielectric layer within the first trench, recessing the first dielectric layer to expose a portion of the first fin structure, forming a first capping layer over the exposed portion of the first fin structure and the recessed first dielectric layer in the first trench, forming a second dielectric layer over the first capping layer in the first trench while the first capping layer covers the exposed portion of the first fin feature and removing the first capping layer from the first fin structure.
Claims20
A device comprising:
- a first dielectric layer disposed on a substrate;
- a first fin structure extending through the first dielectric layer, the first fin structure including:
- a first semiconductor material layer interfacing with the first dielectric layer;
- and
- a second semiconductor material layer disposed on the first semiconductor material layer;
- and
- a first capping layer including a first portion disposed directly on the first semiconductor material layer;
- a second capping layer including a first portion disposed directly on the first capping layer of the first fin structure, wherein the first and second capping layers have different material compositions, and wherein the first capping layer extends to a greater height above the substrate than the second capping layer;
- a first gate dielectric layer disposed directly on the first capping layer;
- and
- a first gate electrode layer disposed on the first gate dielectric layer.
A device comprising:
- a first dielectric layer disposed on a substrate;
- a first fin structure extending through the first dielectric layer, the first fin structure including:
- a first semiconductor material layer;
- and
- a second semiconductor material layer disposed on the first semiconductor material layer;
- and
- a second fin structure extending through the first dielectric layer, the second fin structure including:
- a third semiconductor material layer;
- and
- a fourth semiconductor material layer disposed on the third semiconductor material layer, wherein the first dielectric layer extends from the first fin structure to the second fin structure;
- and
- a first capping layer including a first portion disposed directly on the first semiconductor material layer and the second semiconductor material layer and a second portion disposed directly on the third semiconductor material layer and the fourth semiconductor material layer;
- and
- a second capping layer extending from the first portion of the first capping layer to a second portion of the first capping layer, wherein the first and second capping layers have different material compositions, wherein the first capping layer extends to a greater height above the substrate than the second capping layer, and wherein the first portion of the first capping layer, the second portion of the first capping layer and the second capping layer interface with the first dielectric layer.
A device comprising:
- a first dielectric layer disposed on a substrate;
- a first fin structure extending through the first dielectric layer, the first fin structure including:
- a first semiconductor material layer interfacing with the first dielectric layer;
- and
- a second semiconductor material layer disposed directly on the first semiconductor material layer;
- and
- a first gate structure disposed on the first fin structure;
- a first source/drain feature disposed on a first portion of the first fin structure, the first portion of the first fin structure disposed on a first side of the first gate structure;
- and
- a second source/drain feature disposed on a second portion of the first fin structure, the second portion of the first fin structure disposed on a second side of the first gate structure, the second side being opposite the first side,
- a first capping layer including a first portion disposed directly on the first semiconductor material layer and extending continuously from the first source/drain feature to the second source/drain feature;
- and
- a second capping layer including a first portion disposed directly on the first capping layer of the first fin structure, wherein the first and second capping layers have different material compositions.
Dependencies are inferred from the claim text.