Semiconductor device performing program operation and operating method thereof

A semiconductor device comprising:

• a memory block comprising a plurality of memory cells;
• and
• a peripheral circuit configured to perform a program operation, which comprises a plurality of program loops on selected memory cells among a plurality of memory cells included in the memory block;
• wherein the peripheral circuit comprises control logic, configured to:
• control the program operation of the peripheral circuit;
• control the peripheral circuit to suspend the program operation in response to a program suspend command;
• and
• control the peripheral circuit to perform a pre-verify operation on the selected memory cells, based a modified verify voltage, in response to a program resume command.

A semiconductor device comprising:

• a memory block comprising a plurality of memory cells, each of which store N-bit data per memory cell;
• and
• a peripheral circuit configured to perform a program operation, which includes performing a plurality of program loops on selected memory cells among the plurality of memory cells included in the memory block;
• wherein the peripheral circuit comprises control logic configured to control the program operation of the peripheral circuit in response to a program command, and control the peripheral circuit to suspend the program operation in response to a program suspend command received after verification of memory cells to be programmed to an ith program state among first to (2N−1)th program states passes, and control the peripheral circuit to perform a pre-verify operation on memory cells to be programmed to a jth program state among (i+1)th to (2N−1)th program states, based on a modified verify voltage, in response to a program resume command,
• wherein N is a natural number greater than 1, i is a natural number which is greater than 0 and is smaller than (2N−1), and j is a natural number which is greater than i and is smaller than 2N.