Memory device, operating method thereof, and verification result generator
AssigneeSK hynix Inc.
InventorsHyung Jin CHOI, Chan Sik PARK
Life of this patent
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AssigneeSK hynix Inc.
InventorsHyung Jin CHOI, Chan Sik PARK
Estimating the term…
A memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit including a plurality of page buffers respectively connected to the plurality of memory cells; a sensing circuit connected to the plurality of page buffers respectively, the sensing circuit: performing a sensing operation on the page buffers in units of a plurality of chunks, each chunk including two or more page buffers, among the plurality of page buffers, and outputting a sensing result of each of the plurality of chunks; a verification result output circuit for outputting a final verification result of a target program state, among a plurality of program states to which the memory cells are to be programmed, based on the sensing results of the plurality of chunks; and a control logic for controlling the sensing circuit and the peripheral circuit, based on the final verification result.
A memory device comprising:
A method of operating a memory device, the method comprising:
A verification result generator comprising:
Dependencies are inferred from the claim text.