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US 2024/0177683 A1Published application
Liquid crystal display device and electronic device including the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHajime KIMURA, Atsushi UMEZAKI
Life of this patent
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Abstract
A driver circuit includes a circuit 200, a transistor 101_1, and a transistor 101_2. A signal is selectively input from the circuit 200 to a gate of the transistor 101_1 and the transistor 101_2, so that the transistor 101_1 and the transistor 101_2 are controlled to be on or off. The transistor 101_1 and the transistor 101_2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting.
Claims4
(canceled)
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a capacitor,
- wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor comprises a semiconductor layer comprising an oxide semiconductor,
- wherein one of a source and a drain of the first transistor is directly connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is directly connected to the clock signal line,
- wherein one of a source and a drain of the third transistor is directly connected to the clock signal line,
- wherein the other of the source and the drain of the first transistor is directly connected to an output signal line,
- wherein the other of the source and the drain of the second transistor is directly connected to the output signal line,
- wherein the other of the source and the drain of the third transistor is directly connected to the output signal line,
- wherein a gate of the first transistor is directly connected to one of a source and a drain of the fourth transistor,
- wherein the other of the source and the drain of the fourth transistor is directly connected to one of a source and a drain of the fifth transistor,
- wherein the other of the source and the drain of the fifth transistor is directly connected to a signal line,
- wherein a first electrode of the capacitor is directly connected to a gate of the first transistor,
- wherein a second electrode of the capacitor is directly connected to the output signal line,
- wherein, in a period when the fourth transistor and the fifth transistor are each an on-state, the first transistor turns on by inputting a potential of the signal line to the gate of the first transistor through the fourth transistor and the fifth transistor, and
- wherein a potential of a gate electrode of the first transistor, a potential of a gate electrode of the second transistor, and a potential of a gate electrode of the third transistor are controlled independently.
12 more elements
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a capacitor,
- wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor comprises a semiconductor layer comprising an oxide semiconductor,
- wherein one of a source and a drain of the first transistor is directly connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is directly connected to the clock signal line,
- wherein one of a source and a drain of the third transistor is directly connected to the clock signal line,
- wherein the other of the source and the drain of the first transistor is directly connected to an output signal line,
- wherein the other of the source and the drain of the second transistor is directly connected to the output signal line,
- wherein the other of the source and the drain of the third transistor is directly connected to the output signal line,
- wherein a gate of the first transistor is directly connected to one of a source and a drain of the fourth transistor,
- wherein the other of the source and the drain of the fourth transistor is directly connected to one of a source and a drain of the fifth transistor,
- wherein the other of the source and the drain of the fifth transistor is directly connected to a signal line,
- wherein a first electrode of the capacitor is directly connected to a gate of the first transistor,
- wherein a second electrode of the capacitor is directly connected to the output signal line, wherein the fourth transistor and the fifth transistor are configured to control a timing of raising a potential of the gate of the first transistor, and
- wherein a gate electrode of the first transistor, a gate electrode of the second transistor, and a gate electrode of the third transistor are controlled independently.
11 more elements
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a capacitor,
- wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor comprises a semiconductor layer comprising an oxide semiconductor,
- wherein one of a source and a drain of the first transistor is electrically connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is electrically connected to the clock signal line,
- wherein one of a source and a drain of the third transistor is electrically connected to the clock signal line,
- wherein the other of the source and the drain of the first transistor is electrically connected to an output signal line,
- wherein the other of the source and the drain of the second transistor is electrically connected to the output signal line,
- wherein the other of the source and the drain of the third transistor is electrically connected to the output signal line,
- wherein a gate of the first transistor is electrically connected to one of a source and a drain of the fourth transistor,
- wherein the other of the source and the drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor,
- wherein the other of the source and the drain of the fifth transistor is electrically connected to a signal line,
- wherein a first electrode of the capacitor is electrically connected to a gate of the first transistor,
- wherein a second electrode of the capacitor is electrically connected to the output signal line,
- wherein, in a period when the fourth transistor and the fifth transistor are each an on-state, the first transistor turns on by inputting a potential of the signal line to the gate of the first transistor through the fourth transistor and the fifth transistor, and
- wherein a potential of a gate electrode of the first transistor, a potential of a gate electrode of the second transistor, and a potential of a gate electrode of the third transistor are controlled independently.
12 more elements
Dependencies are inferred from the claim text.