Method for preparing and providing an fpga build result of an fpga model
AssigneedSPACE GmbH
InventorsMartin KRONMUELLER, Dominik LUBELEY, Frank PUSCHMANN, Joerg HAGENDORF
Life of this patent
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AssigneedSPACE GmbH
InventorsMartin KRONMUELLER, Dominik LUBELEY, Frank PUSCHMANN, Joerg HAGENDORF
Estimating the term…
A method for preparing an FPGA build result of an FPGA model is provided. The method includes designating an FPGA subsystem to configure a set of FPGA functions of the FPGA model. A pre-scaling subsystem and a post-scaling subsystem of the FPGA model are designated for execution on a processor. Internal and external interfaces are designated in the pre-scaling subsystem and post-scaling subsystem, where the internal interfaces ensure a data flow within the FPGA model, and the external interfaces ensure a data flow away from the FPGA model. Overall FPGA functionality is generated and the FPGA build result is generated on the basis of the generated overall FPGA functionality, where the FPGA build result includes a single master container file. The FPGA build result is provided to a further application for determining a set of functions of an entire model that includes the FPGA model and a processor model.
A method for preparing and providing a field programmable gate array (FPGA) build result of an FPGA model having at least one overall FPGA functionality, wherein the at least one overall FPGA functionality comprises an FPGA subsystem, a pre-scaling subsystem, and a post-scaling subsystem, the method comprising:
An FPGA model having at least one overall FPGA functionality for an entire model that comprises the FPGA model and a processor model, for determining a set of functions of the entire model, the at least one overall FPGA functionality comprising:
Dependencies are inferred from the claim text.