Method and system for using secure remote direct memory access (rdma) system

A system, comprising:

• a security remote direct memory access (RDMA) system configured in a Field Programmable Gate Array (FPGA) system, the secure RDMA comprising a plurality of processors, operably coupled with one or more memories, and a processor of the plurality of processors configured to:
• detect a connection request to create an encrypted connection between a first computing device and a second computing device, wherein an encryption key is shared between the first computing device and the second computing device;
• in response to sharing the encryption key, access a plurality of images of a plurality of memories of the second computing device, wherein the plurality of images of the plurality of memories comprises memory addresses;
• receive an access request specifying a range of memory addresses from the first computing device based on accessing the plurality of images of the plurality of memories;
• in response to the access request, create an encrypted tunnel between the first computing device and the second computing device to share memory information based on the range of memory addresses of the plurality of memories.

A non-transitory computer-readable medium storing instructions that when executed by a processor cause the processor to:

• detect, by a secure RDMA system, a connection request to create an encrypted connection between a first computing device and a second computing device, wherein an encryption key is shared between the first computing device and the second computing device;
• in response to sharing the encryption key, access a plurality of images of a plurality of memories of the second computing device, wherein the plurality of images of the plurality of memories comprises memory addresses;
• receive an access request specifying a range of memory addresses from the first computing device based on accessing the plurality of images of the plurality of memories;
• in response to the access request, create an encrypted tunnel between the first computing device and the second computing device to share memory information based on the range of memory addresses of the plurality of memories.