US 2024/0176897 A1 · UNLIMITED REPROVISIONABLE HARDWARE ROOT OF TRUST

Abstract

Technologies for protecting a secure context in a hardware root of trust (ROT) are described. One hardware ROT includes key generation logic and a cryptographic circuit. The key generation logic generates a first key from a value, corresponding to a physical variation of the hardware ROT, and first helper data associated with the physical variation of the hardware ROT. The key generation logic generates a second key from the value and second helper data associated with the physical variation of the hardware ROT. The cryptographic circuit receives a first encrypted secure context from off-chip storage and decrypts the first encrypted secure context using the first key to obtain a secure context. The cryptographic circuit encrypts the secure context using the second key to obtain a second encrypted secure context and stores the second encrypted secure context in the off-chip storage.

Claims20

Dependent claims

A hardware root of trust (ROT) comprising:

key generation logic to generate a first key from a value, corresponding to a physical variation of the hardware ROT, and first helper data associated with the physical variation of the hardware ROT, and generate a second key from the value and second helper data associated with the physical variation of the hardware ROT;
and
a cryptographic circuit to:
receive a first encrypted secure context from off-chip storage;
decrypt the first encrypted secure context using the first key to obtain a secure context;
encrypt the secure context using the second key to obtain a second encrypted secure context;
and
store the second encrypted secure context in the off-chip storage.

5 more elements

A method of operating a hardware root of trust (ROT), the method comprising:

generating a first key from a value, corresponding to a physical variation of the hardware ROT, and first helper data associated with the physical variation of the hardware ROT;
receiving a first encrypted secure context from off-chip storage;
decrypting the first encrypted secure context using the first key to obtain a secure context;
generating a second key from the value and second helper data associated with the physical variation of the hardware ROT;
and
encrypting the secure context using the second key to obtain a second encrypted secure context;
and
storing the second encrypted secure context in the off-chip storage.

5 more elements

Dependencies are inferred from the claim text.

Unlimited reprovisionable hardware root of trust

Life of this patent

Unlimited reprovisionable hardware root of trust

Life of this patent

Abstract

Claims20