Machine learning parallelization method using host cpu with multi-socket structure and apparatus therefor

Abstract

Disclosed herein are a method for machine-learning parallelization using host CPUs of a multi-socket structure and an apparatus therefor. The method, performed by the apparatus for machine-learning parallelization using host CPUs of a multi-socket structure, includes a compile phase in which a learning model is split at a layer level for respective pipeline stages and allocated to Non-Uniform Memory Access (NUMA) nodes for respective CPU sockets and a runtime phase in which parameters required for learning are initialized and multiple threads generated in consideration of a policy of each parallelism algorithm are executed by being allocated to respective cores included in the NUMA node.

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