Processor and operating method for a homogeneous dual computing system
AssigneeShanghai Zhaoxin Semiconductor Co., Ltd.
InventorsYingbing GUAN, Zhenhua HUANG, Yanting LI, Yipu LIU
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AssigneeShanghai Zhaoxin Semiconductor Co., Ltd.
InventorsYingbing GUAN, Zhenhua HUANG, Yanting LI, Yipu LIU
Estimating the term…
A processor for building a homogeneous dual computing system is shown. The processor has a trusted core, a normal core, and a shared cache. The trusted core has an access right to an isolated storage space of a system memory. The normal core is homogeneous with the trusted core, and is prohibited from accessing the isolated storage space. In response to a cache flush instruction issued by the normal core, the trusted core initiates and executes a second cache write-back instruction that is different from the first cache write-back instruction. According to the second cache write-back instruction, isolated data associated with the isolated storage space and cached in the shared cache is written back to the isolated storage space before being flushed.
A processor for building a homogeneous dual computing system, comprising:
A method for operating a homogeneous dual computing system, comprising:
Dependencies are inferred from the claim text.