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US 2024/0176684 A1Published application
Application programming interface to indicate storage of accelerator errors
AssigneeNVIDIA Corporation
InventorsKarthik Raghavan Ravi, Ashutosh Jain, Rahul Suresh
Life of this patent
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Abstract
Apparatuses, systems, and techniques to execute one or more application programming interfaces (APIs) to perform one or more operations for one or more accelerators within a heterogeneous processor. In at least one embodiment, one or more processors are to perform one or more instructions in response to one or more APIs to indicate one or more memory regions to store error information from one or more accelerators within a heterogeneous processor.
Claims20
A processor comprising:
- one or more circuits to use an application programming interface (API) to poll one or more errors from one or more accelerators within a heterogeneous processor.
A system comprising:
- one or more processors to use an application programming interface (API) to poll one or more errors from one or more accelerators within a heterogeneous processor.
A method comprising:
- using an application programming interface (API) to poll one or more errors from one or more accelerators within a heterogeneous processor.
Dependencies are inferred from the claim text.