Processing Circuit

A processing circuit comprising

• one or more inputs configured to receive three shares of a first operand and three shares of a second operand;
• a first multiplier configured to determine three shares of the product of the first operand with a blinding value by multiplying each share of the first operand with each share of the blinding value according to a first split of the blinding value into three first shares;
• one or more first adders configured to determine, for each share of the second operand, the sum of the share of the second operand with a respective corresponding second share of the blinding value according to a second split of the blinding value into three second shares, wherein the first split of the blinding value is different from the second split of the blinding value;
• a second adder configured to determine the sum of the sums determined by the one or more first adders;
• one or more second multipliers configured to determine, for each share of the first operand, the product of the share of the first operand with the sum determined by the second adder;
• one or more third adders configured to determine, for each product determined by the one or more second multipliers, a respective share of the product of the first operand with the second operand by summing the product determined by the one or more second multipliers with a respective corresponding share of the product of the first operand with the blinding value.