Latency reduction of boot procedures for memory systems

A non-transitory computer-readable medium storing code, the code comprising instructions executable by a processor to:

• receive a first command to perform a first reset of one or more components of a memory system as part of a first phase of a boot procedure of a host system;
• determine whether a flag associated with the memory system is set from a first value to a second value based at least in part on receiving the first command;
• initiate, by the memory system, an initialization process of a second phase of the boot procedure based at least in part on determining whether the flag is set;
• set the flag from the second value to the first value based at least in part on completing the initialization process of the second phase;
• receive a second command to communicate parameters corresponding to characteristics of the memory system with the host system based at least in part on setting the flag from the second value to the first value;
• communicate the parameters corresponding to the characteristics of the memory system with the host system based at least in part on receiving the second command;
• and
• perform a configuration operation of a logical-to-physical mapping of the memory system concurrently with communicating the parameters with the host system and after setting the flag from the second value to the first value.

A method, comprising:

• receiving a first command to perform a first reset of one or more components of a memory system as part of a first phase of a boot procedure of a host system;
• determining whether a flag associated with the memory system is set from a first value to a second value based at least in part on receiving the first command;
• initiating, by the memory system, an initialization process of a second phase of the boot procedure based at least in part on determining whether the flag is set;
• setting the flag from the second value to the first value based at least in part on completing the initialization process of the second phase;
• receiving a second command to communicate parameters corresponding to characteristics of the memory system with the host system based at least in part on setting the flag from the second value to the first value;
• communicating the parameters corresponding to the characteristics of the memory system with the host system based at least in part on receiving the second command;
• and
• performing a configuration operation of a logical-to-physical mapping of the memory system concurrently with communicating the parameters with the host system and after setting the flag from the second value to the first value.