Performing memory access operations based on quad-level cell to single-level cell mapping table

Abstract

Quad-to-single (Q2S) data structure comprising a plurality of entries maintained on a volatile memory device. Each Q2S mapping entry, identified by a physical address of a quad-level cell (QLC) block stripe of a non-volatile memory device, comprises a bit flag and a pointer to a linked list on the volatile memory device. Responsive to programming at least one single-level cell (SLC) block stripe of a plurality of SLC block stripes with data to be programmed to a QLC block stripe, an entry for an identification of the QLC block stripe to be programmed and an entry for each physical address of the at least one SLC block stripe of the plurality of SLC block stripes programmed with data to be programmed to the QLC block stripe is appended to a linked list corresponding to a Q2S mapping entry associated with the QLC block stripe to be programmed.

Dependencies are inferred from the claim text.