Parameter table protection for a memory system
AssigneeMicron Technology, Inc.
InventorBinbin Huo
Life of this patent
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Abstract
Methods, systems, and devices for parameter table protection for a memory system are described. Upon booting a memory system for a first time, the memory system or a host system may generate an error control code associated with parameter data stored to the memory system. The error control code may be stored to the memory system and may be configured to correct one or more errors in the parameter data upon subsequent boot sequences of the memory system. Accordingly, upon booting the memory system for a second or a subsequent time, the error control code may be used to identify and correct errors in the parameter data, which may reduce the quantity of copies of parameter data stored to the memory system and may prevent the memory system from experiencing a system crash.
Claims21
(canceled)
A method by a memory system, comprising:
- generating, in response to booting the memory system for a first occurrence, a first error control code associated with parameter data for operating the memory system, the parameter data stored to a non-volatile memory device of the memory system;
- generating, in response to booting the memory system for a second occurrence, a second error control code associated with the parameter data;
- and
- determining whether the parameter data comprises one or more errors based at least in part on a comparison of the first error control code and the second error control code.
A method by a host system, comprising:
- generating, based at least in part on a memory system being booted for a first occurrence, a first error control code associated with parameter data for operating the memory system;
- generating a second error control code associated with the parameter data based at least in part on the memory system being booted for a second occurrence;
- and
- determining whether the parameter data comprises one or more errors based at least in part on a comparison of the first error control code to the second error control code.
A memory system, comprising:
- one or more non-volatile memory devices;
- and
- processing circuitry coupled with the one or more non-volatile memory devices and configured to cause the memory system to:
- generate, in response to booting the memory system for a first occurrence, a first error control code associated with parameter data for operating the memory system, the parameter data stored to a non-volatile memory device of the memory system;
- generate, in response to booting the memory system for a second occurrence, a second error control code associated with the parameter data;
- and
- determine whether the parameter data comprises one or more errors based at least in part on a comparison of the first error control code and the second error control code.
Dependencies are inferred from the claim text.