Partial array refresh timing

A memory controller, comprising:

• a shadow refresh masking register;
• a command interface to couple to a memory component that includes a refresh masking register;
• the command interface to transmit a first indicator of a first masked segment to the memory component;
• shadow refresh masking register updating circuitry to, based on an indicator of the first masked segment, update the shadow refresh masking register to indicate a first masked segments value that indicates the first masked segment will not be refreshed by the memory component in response to a next refresh command transmitted via the command interface;
• and
• command timing control circuitry to, based on the first masked segments value, select a first minimum required time interval between a first transmission, via the command interface, of the next refresh command and a second transmission, via the command interface, of a next subsequent memory access command.

A memory controller, comprising:

• a command interface to couple to a memory component that includes a refresh masking register;
• the command interface to transmit a first indicator of a first masked segment to the memory component;
• circuitry to, based on an indicator associated with a pattern of rows to be refreshed, indicate a first set of rows to be refreshed, and a second set of rows to not be refreshed, by a next refresh command;
• circuitry to, based on the first set of rows and the second set of rows, indicate a set of candidate segments for the next refresh command;
• and
• command timing control circuitry to, based on the set of candidate segments and the first masked segment, select a first minimum required time interval between a first transmission, via the command interface, of the next refresh command and a second transmission, via the command interface, of a next subsequent memory access command.

A method of operating a memory controller, comprising:

• transmitting, to a memory component, a first indicator of a first segment that is not to be refreshed by the memory component;
• updating a shadow refresh masking register to indicate a first masked segments value that indicates the first segment will not be refreshed by the memory component;
• based on the first masked segments value, selecting a first minimum required time interval between a first transmission, via a command interface coupled with the memory component, of a next refresh command and a second transmission, via the command interface, of a next subsequent access command to be transmitted via the command interface;
• transmitting the next refresh command via the command interface;
• and
• after at least the first minimum required time interval from transmission of the next refresh command via the command interface, transmitting the next subsequent access command via the command interface.