Frequency multiplier circuit with programmable frequency transition controller

A method of operating a frequency multiplier circuit, comprising:

• receiving a reference signal having a reference frequency and a reference phase;
• generating a digital representation of the reference frequency and reference phase;
• multiplying the digital representation of the reference frequency and reference phase by a first multiplier value;
• comparing the digital representation of the reference frequency and reference phase to a digital representation of an output signal having an output frequency and an output phase, and generating an error signal based on the comparison;
• producing a control signal based at least in part on the error signal;
• generating in response to the control signal, with a frequency generation circuit, the output signal having the output frequency and phase;
• generating the digital representation of the output signal and feeding back the digital representation of the output signal to the phase comparison circuitry;
• and
• programmably controlling a transitioning frequency relationship between a first signal frequency and a desired second signal frequency.

A phase-locked loop (PLL) circuit, comprising:

• a first multiplier circuit to generate a first digital value representing a received reference signal having a reference frequency and reference phase, the multiplier circuit to multiply the first digital value by a multiplier value;
• comparison circuitry to compare the first digital value to an output digital value representing an output signal having an output frequency and an output phase, the comparison circuitry to generate an error signal based on the comparison;
• a programmable loop filter to generate a control signal based at least in part on the error signal;
• a frequency generation circuit to produce the output signal having the output frequency and phase;
• a phase-to-digital converter coupled between the frequency generation circuit and the comparison circuitry to generate the output digital value and feed the output digital value to the comparison circuitry;
• and
• a programmable transition controller to control a transitioning frequency relationship between a first signal frequency of a first locked output signal and a desired second signal frequency.