Flexible Circuit for Real and Complex Filter Operations

Digital signal processing circuitry comprising:

• input circuitry comprising six inputs;
• a first multiplier pair coupled to a first three inputs of the six inputs, wherein one of the first three inputs is shared by the first multiplier pair and the other two of the first three inputs are unshared by the first multiplier pair;
• and
• a second multiplier pair coupled to a second three inputs of the six inputs, wherein one of the second three inputs is shared by the second multiplier pair and the other two of the second three inputs are unshared by the second multiplier pair.

A method comprising:

• receiving a plurality of inputs into a digital signal processing block;
• providing a first three inputs of the plurality of inputs to a first multiplier pair, wherein one of the first three inputs is shared by the first multiplier pair and the other two of the first three inputs are unshared by the first multiplier pair;
• providing a second three inputs of the plurality of inputs to a second multiplier pair, wherein one of the second three inputs is shared by the second multiplier pair and the other two of the second three inputs are unshared by the second multiplier pair;
• summing outputs of the first multiplier pair;
• and
• summing outputs of the second multiplier pair.