Solid-state image pickup apparatus and electronic equipment
AssigneeSony Semiconductor Solutions Corporation
InventorsHIROAKI AMMO, HIROKAZU EJIRI, AKIKO HONJO
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Abstract
A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.
Claims12
A light detecting device, comprising:
- a photoelectric conversion region disposed in a substrate;
- a first transistor that is configured to transfer a charge generated in the photoelectric conversion region;
- a second transistor electrically connected to the first transistor;
- and
- a wiring layer disposed on the substrate and electrically connected to the first transistor, wherein
- the first transistor comprises a first semiconductor area extending in a vertical direction with respect to the substrate, an insulating film disposed around the first semiconductor area, and a gate disposed with the insulating film interposed between the gate and the first semiconductor area, and
- in a cross-sectional view, the second transistor comprises a second semiconductor area disposed in a same level as at least a part of the first semiconductor area.
A light detecting device, comprising:
- a photoelectric conversion region disposed in a substrate;
- a first transistor configured to transfer a charge generated in the photoelectric conversion region;
- a second transistor electrically connected to the first transistor;
- and
- a wiring layer disposed on the substrate and electrically connected to the first transistor, wherein
- the first transistor comprises a first semiconductor area extending in a vertical direction with respect to the substrate, an insulating film disposed around the first semiconductor area, and a gate disposed with the insulating film interposed between the gate and the first semiconductor area, and
- the second transistor comprises a second semiconductor area, the wiring layer being disposed between the first semiconductor area and the second semiconductor area.
Dependencies are inferred from the claim text.